Principal / Senior Principal Design Verification Engineer- CXL / PCIe / Ethernet

Astera Labs · San Jose, California, United States · More jobs in San Jose · United States

Design & UX · Lead / manager

Published by the employer 2026-09-14 · Last observed 2026-10-13

About the role

Design Verification (DNU) (US_DV_CCE1) · San Jose, California, United States Full requirements and the application form are on the employer's original listing.

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